Team:Groningen/Project

From 2011.igem.org

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<span style="font-size: 1.5em">iGEM 2011 Groningen team page</span>
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This is a template page. READ THESE INSTRUCTIONS.
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You are provided with this team page template with which to start the iGEM season.  You may choose to personalize it to fit your team but keep the same "look." Or you may choose to take your team wiki to a different level and design your own wiki.  You can find some examples <a href="https://2008.igem.org/Help:Template/Examples">HERE</a>.
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Preliminary project description
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You <strong>MUST</strong> have a team description page, a project abstract, a complete project description, a lab notebook, and a safety page.  PLEASE keep all of your pages within your teams namespace. 
 
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The aim of our project is to create a genetic circuit that will be able to count and memorize the occurrences of an input signal by using autoinducing loops and interfering RNA. Each increase of the counter will result in a different state of the system that will be expressed after adding a second input signal. The design of the circuit allows the system to be extended.
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More information will follow soon!
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|You can write a background of your team here.  Give us a background of your team, the members, etc.  Or tell us more about something of your choosing.
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|[[Image:Groningen_logo.png|200px|right|frame]]
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''Tell us more about your project.  Give us background.  Use this is the abstract of your project.  Be descriptive but concise (1-2 paragraphs)''
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|[[Image:Groningen_team.png|right|frame|Your team picture]]
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|align="center"|[[Team:Groningen | Team Example]]
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[[File:Scheme1.png]]
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''The first input triggers the first memory unit (which consists of an autoinducing loop and a jammer-based off switch) to start. The first memory unit starts triggering the first AND gate. The second input triggers the AND gate. If the first memory unit is running, this triggers the second memory unit (which also consists of an autoinducing loop and a jammer-based off switch) to start. The second module starts trigerring the second AND gate and represses the first module with the use of the jammer-based off switch. This process can be continued, if more autoinducing loops are provided. When memory release input is introduced, the system produces an output depending on which of the memory modules is running.''
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!align="center"|[[Team:Groningen|Home]]
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!align="center"|[[Team:Groningen/Team|Team]]
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!align="center"|[https://igem.org/Team.cgi?year=2010&team_name=Groningen Official Team Profile]
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!align="center"|[[Team:Groningen/Project|Project]]
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!align="center"|[[Team:Groningen/Parts|Parts Submitted to the Registry]]
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!align="center"|[[Team:Groningen/Modeling|Modeling]]
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!align="center"|[[Team:Groningen/Notebook|Notebook]]
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!align="center"|[[Team:Groningen/Safety|Safety]]
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!align="center"|[[Team:Groningen/Attributions|Attributions]]
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== '''Overall project''' ==
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Your abstract
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== Project Details==
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=== Part 2 ===
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=== The Experiments ===
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=== Part 3 ===
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== Results ==
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Revision as of 09:46, 12 May 2011

RUGlogo.png


iGEM 2011 Groningen team page

Preliminary project description

The aim of our project is to create a genetic circuit that will be able to count and memorize the occurrences of an input signal by using autoinducing loops and interfering RNA. Each increase of the counter will result in a different state of the system that will be expressed after adding a second input signal. The design of the circuit allows the system to be extended.

More information will follow soon!

Scheme1.png

The first input triggers the first memory unit (which consists of an autoinducing loop and a jammer-based off switch) to start. The first memory unit starts triggering the first AND gate. The second input triggers the AND gate. If the first memory unit is running, this triggers the second memory unit (which also consists of an autoinducing loop and a jammer-based off switch) to start. The second module starts trigerring the second AND gate and represses the first module with the use of the jammer-based off switch. This process can be continued, if more autoinducing loops are provided. When memory release input is introduced, the system produces an output depending on which of the memory modules is running.